In video signal processing and storage arrangements, each scan line in a video signal frame being generated by imaging equipment is obtained or "grabbed" by employing a circuit arrangement commonly referred to as a frame grabber. The imaging equipment being, for example, a video camera or video recorder which uses a standard video scanning format. A frame grabber circuit typically employs a conventional phase comparator and voltage controlled crystal oscillator (VCXO) connected in a phase-locked loop (PLL) circuit to generate a sample clock signal for digitally sampling the active portion of the video signal. The PLL circuit maintains a constant phase relationship between the sample clock signal and a horizontal sync signal employed by the respective imaging equipment. This ensures that the frame grabber samples the first and following picture elements, i.e., pixels, of each scan line at virtually the same point.
Digital imaging devices, used in medical applications, on the other hand, use nonstandard scanning formats as compared to the so-called "standard" formats used in prior known devices. For example, the scanning rate (pixel clock rate) used in such imaging devices could be between 4 Mhz and 32 Mhz and the frequency of the associated horizontal sync signal could be between 15 Khz and 32 Khz. Irrespective of such nonstandard scanning formats, it is desirable to sample the pixels at a rate equal to the pixel clock rate of the respective imagining device to ensure that each pixel is scanned only once. It is further desirable to synchronize the sample clock signal with the phase of the horizontal sync signal of the respective imaging device to ensure that the first pixel of each scan line is sampled at virtually the same point relative to the horizontal sync signal.
It would thus appear that a conventional PLL frequency synthesizer using the horizontal sync signal as the reference signal could provide the sample clock signal needed by a frame grabber circuit that may be employed in such medical image devices. However, we found this not to be the case. In fact, we found that a conventional VCXO at most deviates 2000 ppm and, therefore, cannot vary over a wide range of frequencies, such as, for example, a range of frequencies between 4 Mhz and 32 Mhz. In addition, a conventional PLL frequency synthesizer using a L-C tuned VCO designed to operate between 4 Mhz and 32 Mhz and using the horizontal sync signal as the reference signal provided to unstable. Specifically, once the synthesizer adapts and is outputting the desired sample clock rate, any small change in the phase of the horizontal sync signal causes the frequency of the L-C tuned VCO, and hence, the sample clock rate, to change significantly, thereby causing the frame grabber to either sample the same pixel more than once or fail to sample one or more pixels.